In the integrated circuit industry, it is necessary for a test engineer or for software to generate test instructions which may be used in a test environment to ensure proper operation of an integrated circuit 24. In order to do so, the industry has used pseudo-random test pattern generation algorithms, such as the random test pattern generation (RTPG) scheme, to randomly generate test instruction sequences for use in testing microprocessors. In general, the use of RTPG and other similar pseudo-random test generation algorithms cannot randomly create narrowly focused and highly specific test sequences to test specific aspects of an integrated circuit. These specific test sequences, therefore, cannot be randomly generated by software, but must instead be hand written by a test engineer familiar with the integrated circuit. In addition, given this hand generated test sequence, the test engineer must then determine the proper expected result from the integrated circuit in order to insure if the hand written test sequence properly executed on the integrated circuit. Hand writing this test code and determining by hand the expected result from the integrated circuit is time consuming and not cost effective. In addition, the generation of the hand-crafted test code and hand determined expected results are very subject to human error. Therefore, the need exists for a more comprehensive test generation tool which can automatically generate narrowly-focused, highly-specialized test sequences.